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-rw-r--r--src/m.tex11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/m.tex b/src/m.tex
index 9f0ee4c..d9cdeff 100644
--- a/src/m.tex
+++ b/src/m.tex
@@ -98,8 +98,15 @@ MULDIV & divisor & dividend & DIV[U]W/REM[U]W & dest & OP-32 \\
DIV and DIVU perform an XLEN bits by XLEN bits signed and unsigned integer
division of {\em rs1} by {\em rs2}, rounding towards zero.
-REM and REMU provide the remainder of the
-corresponding division operation. If both the quotient and remainder
+REM and REMU provide the remainder of the corresponding division operation.
+For REM, the sign of the result equals the sign of the dividend.
+
+\begin{commentary}
+For both signed and unsigned division, it holds that
+\mbox{$\textrm{dividend} = \textrm{divisor} \times \textrm{quotient} + \textrm{remainder}$}.
+\end{commentary}
+
+If both the quotient and remainder
are required from the same division, the recommended code sequence is:
DIV[U] {\em rdq, rs1, rs2}; REM[U] {\em rdr, rs1, rs2} ({\em rdq}
cannot be the same as {\em rs1} or {\em rs2}). Microarchitectures can