diff options
Diffstat (limited to 'src/f.tex')
-rw-r--r-- | src/f.tex | 28 |
1 files changed, 20 insertions, 8 deletions
@@ -465,14 +465,6 @@ in {\em rs1} and {\em rs2}, negates the product, subtracts the value in {\em rs3}, and writes the final result to {\em rd}. FNMADD.S computes {\em -(rs1$\times$rs2)-rs3}. -The fused multiply-add instructions must raise the invalid operation exception -when the multiplicands are $\infty$ and zero, even when the addend is a quiet -NaN. -\begin{commentary} -The IEEE 754-2008 standard permits, but does not require, raising the -invalid exception for the operation \mbox{$\infty\times 0\ +$ qNaN}. -\end{commentary} - \vspace{-0.2in} \begin{center} \begin{tabular}{R@{}F@{}R@{}R@{}F@{}R@{}O} @@ -498,6 +490,26 @@ src3 & S & src2 & src1 & RM & dest & F[N]MADD/F[N]MSUB \\ \end{tabular} \end{center} +\begin{commentary} + The fused multiply-add (FMA) instructions consume a large part of the + 32-bit instruction encoding space. Some alternatives considered were + to restrict FMA to only use dynamic rounding modes, but static + rounding modes are useful in code that exploits the lack of product + rounding. Another alternative would have been to use rd to provide + rs3, but this would require additional move instructions in some + common sequences. The current design still leaves a large portion of + the 32-bit encoding space open while avoiding having FMA be + non-orthogonal. +\end{commentary} + +The fused multiply-add instructions must raise the invalid operation exception +when the multiplicands are $\infty$ and zero, even when the addend is a quiet +NaN. +\begin{commentary} +The IEEE 754-2008 standard permits, but does not require, raising the +invalid exception for the operation \mbox{$\infty\times 0\ +$ qNaN}. +\end{commentary} + \section{Single-Precision Floating-Point Conversion and Move \mbox{Instructions}} Floating-point-to-integer and integer-to-floating-point conversion |