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1 files changed, 2 insertions, 2 deletions
diff --git a/src/a.tex b/src/a.tex
index 96e662d..5d64cbc 100644
--- a/src/a.tex
+++ b/src/a.tex
@@ -103,7 +103,7 @@ For RV64, LR.W and SC.W sign-extend the value placed in {\em rd}.
Both compare-and-swap (CAS) and LR/SC can be used to build lock-free
data structures. After extensive discussion, we opted for LR/SC for
several reasons: 1) CAS suffers from the ABA problem, which LR/SC
-avoids because it monitors all accesses to the address rather than
+avoids because it monitors all writes to the address rather than
only checking for changes in the data value; 2) CAS would also require
a new integer instruction format to support three source operands
(address, compare value, swap value) as well as a different memory
@@ -435,7 +435,7 @@ are encoded with an R-type instruction format. These AMO instructions
atomically load a data value from the address in {\em rs1}, place the
value into register {\em rd}, apply a binary operator to the loaded
value and the original value in {\em rs2}, then store the result back
-to the address in {\em rs1}. AMOs can either operate on 64-bit (RV64
+to the original address in {\em rs1}. AMOs can either operate on 64-bit (RV64
only) or 32-bit words in memory. For RV64, 32-bit AMOs always
sign-extend the value placed in {\em rd}, and ignore the upper 32 bits
of the original value of {\em rs2}.