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| -rw-r--r-- | src/hypervisor.tex | 6 | ||||
| -rw-r--r-- | src/priv-intro.tex | 9 |
2 files changed, 6 insertions, 9 deletions
diff --git a/src/hypervisor.tex b/src/hypervisor.tex index 6aaf24b..e054bdd 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -1,8 +1,8 @@ -\chapter{Hypervisor Extensions, Version 1.0-draft} +\chapter{Hypervisor Extensions, Version 0.0} \label{hypervisor} -This chapter presents an early proposal for RISC-V hypervisor support -with an extended S-mode. +This chapter is a placeholder for RISC-V hypervisor support with an +extended S-mode. \begin{commentary} The privileged architecture is designed to simplify the use of classic diff --git a/src/priv-intro.tex b/src/priv-intro.tex index 92cb855..ca1ea41 100644 --- a/src/priv-intro.tex +++ b/src/priv-intro.tex @@ -127,12 +127,9 @@ interface (HBI), to isolate the hypervisor from details of the hardware platform. \begin{commentary} -The various ABI, SBI, and HBIs are still a work-in-progress, but we -anticipate the SBI and HBI to support devices via virtualized device -interfaces similar to virtio~\cite{virtio}, and to support device -discovery. In this manner, only one set of device drivers need be -written that can support any OS or hypervisor, and which can also be -shared with the boot environment. +The ABI, SBI, and HBI are still a work-in-progress, but we are now +prioritizing support for Type-2 hypervisors where the SBI is provided +recursively by an S-mode OS. \end{commentary} Hardware implementations of the RISC-V ISA will generally require |