diff options
| -rw-r--r-- | src/machine.tex | 8 | ||||
| -rw-r--r-- | src/supervisor.tex | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/machine.tex b/src/machine.tex index ba1e1aa..0deda94 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -1733,10 +1733,10 @@ and virtual addresses. It need not be capable of holding all possible invalid addresses. Implementations may convert some invalid address patterns into other invalid addresses prior to writing them to {\tt mepc}. -When a trap is taken into M-mode, {\tt mepc} is written with the virtual -address of the instruction that encountered the exception or was interrupted. -Otherwise, {\tt mepc} is never written by the implementation, though it may be -explicitly written by software. +When a trap is taken into M-mode, {\tt mepc} is written with the +virtual address of the instruction that was interrupted or that +encountered the exception. Otherwise, {\tt mepc} is never written by +the implementation, though it may be explicitly written by software. \begin{figure}[h!] {\footnotesize diff --git a/src/supervisor.tex b/src/supervisor.tex index fa9aaa0..6585bbd 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -558,9 +558,9 @@ addresses. Implementations may convert some invalid address patterns into other invalid addresses prior to writing them to {\tt sepc}. When a trap is taken into S-mode, {\tt sepc} is written with the -virtual address of the instruction that encountered the exception or -was interrupted. Otherwise, {\tt sepc} is never written by the -implementation, though it may be explicitly written by software. +virtual address of the instruction that was interrupted or that +encountered the exception. Otherwise, {\tt sepc} is never written by +the implementation, though it may be explicitly written by software. \begin{figure}[h!] {\footnotesize |