diff options
| -rw-r--r-- | src/supervisor.tex | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex index 99d06e1..0c964bd 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -594,8 +594,8 @@ explicitly written by software. The Interrupt bit in the {\tt scause} register is set if the trap was caused by an interrupt. The Exception Code field contains a code identifying the last exception. Table~\ref{scauses} -lists the possible exception codes for the current supervisor ISAs, in -descending order of priority. The Exception Code is a \wlrl\ field, +lists the possible exception codes for the current supervisor ISAs. +The Exception Code is a \wlrl\ field, so is only guaranteed to hold supported exception codes. \begin{figure*}[h!] @@ -657,7 +657,8 @@ so is only guaranteed to hold supported exception codes. \hline \end{tabular} \end{center} -\caption{Supervisor cause register ({\tt scause}) values after trap.} +\caption{Supervisor cause register ({\tt scause}) values after trap. +Synchronous exception priorities are given by Table~\ref{exception-priority}.} \label{scauses} \end{table*} |