Moved fence.tso out of base ISA chapter and into separate chapter.

2 files changed, 2 insertions, 17 deletions

diff --git a/src/riscv-spec.tex b/src/riscv-spec.tex
index 80cd067..c855ccc 100644
--- a/src/riscv-spec.tex
+++ b/src/riscv-spec.tex
@@ -82,6 +82,7 @@ Andrew Waterman and Krste Asanovi\'{c}, RISC-V Foundation, May 2017.
 \input{d}
 \input{q}
 \input{rvwmo}
+\input{zifencetso}
 \input{l}
 \input{c}
 \input{b}
diff --git a/src/rv32.tex b/src/rv32.tex
index 60707dd..6470cb6 100644
--- a/src/rv32.tex
+++ b/src/rv32.tex
@@ -1153,9 +1153,6 @@ FENCE.
 \hline
 0000 & \em none & Normal Fence \\
 \hline
-\multirow{2}{*}{1000} & \multirow{2}{*}{TSO} & With FENCE RW,RW: exclude write-to-read ordering \\
-                      &                      & Otherwise: \em Reserved for future use. \\
-\hline
 \multicolumn{2}{|c|}{\em other} & \em Reserved for future use. \\
 \hline
 \end{tabular}
@@ -1167,20 +1164,7 @@ FENCE.
 
 The fence mode field {\em fm} defines the semantics of the FENCE.  A
 FENCE with {\em fm}=0000 orders all memory operations in its
-predecessor set before all memory operations in its successor set.  A
-FENCE.TSO instruction orders all load operations in its predecessor
-set before all memory operations in its successor set, and all store
-operations in its predecessor set before all store operations in its
-successor set.  This leaves non-AMO store operations in the
-FENCE.TSO's predecessor set unordered with non-AMO loads in its
-successor set.
-
-\begin{commentary}
-  The FENCE.TSO encoding was added as an optional extension to the
-  original base FENCE instruction encoding.  The base definition
-  requires that implementations ignore any set bits and treat the
-  FENCE as global, and so this is a backwards-compatible extension.
-\end{commentary}
+predecessor set before all memory operations in its successor set. 
 
 The unused fields in the FENCE instructions---{\em rs1} and {\em rd}---are
 reserved for finer-grain fences in future extensions.  For forward