SX -> SXL

2 files changed, 25 insertions, 25 deletions

diff --git a/src/machine.tex b/src/machine.tex
index f018af2..e469056 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -403,8 +403,8 @@ privilege-level ISAs respectively.
 \hline
 \multicolumn{1}{|c|}{SD} &
 \multicolumn{1}{c|}{\wpri} &
-\multicolumn{1}{c|}{SX} &
-\multicolumn{1}{c|}{UX} &
+\multicolumn{1}{c|}{SXL} &
+\multicolumn{1}{c|}{UXL} &
 \multicolumn{1}{c|}{\wpri} &
 \multicolumn{1}{c|}{TVM} &
 \multicolumn{1}{c|}{MXR} &
@@ -527,39 +527,39 @@ embedded systems with only M-mode and U-mode present.
 
 \subsection{Base ISA Control in {\tt mstatus} Register}
 
-The SX and UX fields control the value of XLEN for S-mode and U-mode,
+The SXL and UXL fields control the value of XLEN for S-mode and U-mode,
 respectively.  The encoding of these fields is the same as that of the Base
 field of {\tt misa}, shown in Table~\ref{misabase}.  These fields only exist
 for RV64 and RV128; RV32 machines always use RV32 for S-mode and U-mode.
 
-The SX field is only implemented if S-mode is implemented, and is otherwise
-hard-wired to zero.  An implementation may limit the values to which SX can be
-set.  The allowed values for SX may be a function of the machine XLEN.
+The SXL field is only implemented if S-mode is implemented, and is otherwise
+hard-wired to zero.  An implementation may limit the values to which SXL can be
+set.  The allowed values for SXL may be a function of the machine XLEN.
 Changing the machine XLEN (such as by changing the Base field of {\tt misa})
-may cause SX to change as a side effect, regardless of whether the previous
-value of SX would have been compatible with the new machine XLEN.  An
-implementation must enforce that SX specifies a width less than or equal to
+may cause SXL to change as a side effect, regardless of whether the previous
+value of SXL would have been compatible with the new machine XLEN.  An
+implementation must enforce that SXL specifies a width less than or equal to
 the machine XLEN.  If the Base field of {\tt misa} is always nonzero, an
-implementation may hard-wire SX to be a read-only copy of Base.
+implementation may hard-wire SXL to be a read-only copy of Base.
 
-The UX field is only implemented if U-mode is implemented, and is otherwise
-hard-wired to zero.  If S-mode is not supported, the allowed values for UX may
+The UXL field is only implemented if U-mode is implemented, and is otherwise
+hard-wired to zero.  If S-mode is not supported, the allowed values for UXL may
 be a function of the machine XLEN.  Changing the machine XLEN (such as by
-changing the Base field of {\tt misa}) may cause UX to change as a side
-effect, regardless of whether the previous value of UX would have been
-compatible with the new machine XLEN.  An implementation must enforce that UX
+changing the Base field of {\tt misa}) may cause UXL to change as a side
+effect, regardless of whether the previous value of UXL would have been
+compatible with the new machine XLEN.  An implementation must enforce that UXL
 specifies a width less than or equal to the machine XLEN.  If the Base field of
-{\tt misa} is always nonzero, an implementation may hard-wire UX to be a
+{\tt misa} is always nonzero, an implementation may hard-wire UXL to be a
 read-only copy of Base.
 
-If S-mode is supported, the allowed values for UX may be a function of the
-value of field SX.  Changing SX may cause UX to change as a side effect,
-regardless of whether the previous value of UX would have been compatible with
-the new SX.  When an instruction explicitly writes both SX and UX together
+If S-mode is supported, the allowed values for UXL may be a function of the
+value of field SXL.  Changing SXL may cause UXL to change as a side effect,
+regardless of whether the previous value of UXL would have been compatible with
+the new SXL.  When an instruction explicitly writes both SXL and UXL together
 (such as a CSR instruction that writes {\tt mstatus}), the effect is as though
-SX is written first, any side effects from changing SX occur, and then UX is
-written.  An implementation must enforce that UX is no greater than SX, and
-may hard-wire UX to be a read-only copy of SX.
+SXL is written first, any side effects from changing SXL occur, and then UXL is
+written.  An implementation must enforce that UXL is no greater than SXL, and
+may hard-wire UXL to be a read-only copy of SXL.
 
 \subsection{Memory Privilege in {\tt mstatus} Register}
 
diff --git a/src/supervisor.tex b/src/supervisor.tex
index 74182cf..40a20ac 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -126,10 +126,10 @@ sstatus} is equivalent to reading or writing the homonymous field in
 
 \subsection{Base ISA Control in {\tt sstatus} Register}
 
-The UX field controls the value of XLEN for U-mode.  The encoding of UX is the
+The UXL field controls the value of XLEN for U-mode.  The encoding of UXL is the
 same as that of the Base field of {\tt misa}, shown in Table~\ref{misabase}.
 This field only exists for RV64 and RV128; RV32 machines always use RV32 for
-U-mode.  An implementation may limit the values to which UX can be set, but
+U-mode.  An implementation may limit the values to which UXL can be set, but
 U-mode XLEN must not exceed S-mode XLEN.
 
 \note{AW: add this to sstatus figure}