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| author | Alexandre Joannou <gameboo@users.noreply.github.com> | 2018-05-02 23:30:03 +0100 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-05-02 15:30:03 -0700 |
| commit | 3559c11db55e96e1220c6b032d9d920b1808f151 (patch) | |
| tree | 382a14fd5140eb235138683b2b45811571ca8512 /src | |
| parent | 64786dec5330b6618fd0e0f63bd34bf399075beb (diff) | |
| download | riscv-isa-manual-3559c11db55e96e1220c6b032d9d920b1808f151.zip riscv-isa-manual-3559c11db55e96e1220c6b032d9d920b1808f151.tar.gz riscv-isa-manual-3559c11db55e96e1220c6b032d9d920b1808f151.tar.bz2 | |
Clarify URET with no user-mode traps support (#164)
* Explicitly raise an illegal instruction exception for URET with no user-mode traps
* Folding aswaterman comment about SRET and redundant text.
Diffstat (limited to 'src')
| -rw-r--r-- | src/machine.tex | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/machine.tex b/src/machine.tex index c3dc2d2..ac89048 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -1996,8 +1996,10 @@ MRET/SRET/URET & 0 & PRIV & 0 & SYSTEM \\ To return after handling a trap, there are separate trap return instructions per privilege level: MRET, SRET, and URET. MRET is -always provided, while SRET must be provided if supervisor mode is -supported. URET is only provided if user-mode traps are supported. +always provided. SRET must be provided if supervisor mode is +supported, and should raise an illegal instruction otherwise. +URET is only provided if user-mode traps are supported, and +should raise an illegal instruction otherwise. An {\em x}\,RET instruction can be executed in privilege mode {\em x} or higher, where executing a lower-privilege {\em x}\,RET instruction will pop the relevant lower-privilege interrupt enable and privilege |