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| author | Andrew Waterman <andrew@sifive.com> | 2018-12-14 11:41:20 -0800 |
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| committer | Andrew Waterman <andrew@sifive.com> | 2018-12-14 11:41:20 -0800 |
| commit | 303d8dde10da6c5ae603ea80ec56aeb9aa3f55e4 (patch) | |
| tree | fb84c57bf15b06cfb3fb8a72fbee397fadd9fad4 /src | |
| parent | 3a52eaa0560bd8e413e7ca0efda2511256fc3ff1 (diff) | |
| download | riscv-isa-manual-303d8dde10da6c5ae603ea80ec56aeb9aa3f55e4.zip riscv-isa-manual-303d8dde10da6c5ae603ea80ec56aeb9aa3f55e4.tar.gz riscv-isa-manual-303d8dde10da6c5ae603ea80ec56aeb9aa3f55e4.tar.bz2 | |
cleanup
Diffstat (limited to 'src')
| -rw-r--r-- | src/naming.tex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/naming.tex b/src/naming.tex index 31c994f..aa1b14a 100644 --- a/src/naming.tex +++ b/src/naming.tex @@ -33,7 +33,7 @@ extensions to the integer bases are: ``D'' for double-precision floating-point instructions. Any RISC-V instruction-set variant can be succinctly described by concatenating the base integer prefix with the names of the included -extensions. For example, ``RV64IMA''. +extensions, e.g., ``RV64IMAFD''. We have also defined an abbreviation ``G'' to represent the ``IMAFD'' base and extensions, as this is intended to represent our standard @@ -77,7 +77,7 @@ time of this document, e.g., ``RV32G'' is equivalent to \section{Underscores} Underscores ``\_'' may be used to separate ISA extensions to -improve readability and to provide disambiguation. For example, ``RV32I2\_M2\_A2''. +improve readability and to provide disambiguation, e.g., ``RV32I2\_M2\_A2''. \section{Additional Standard Extension Names} |