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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-07-27 06:56:57 -0700 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-07-27 06:56:57 -0700 |
commit | ffdd9891d8189cb6acc3ec4e3d6ac68762be264f (patch) | |
tree | 510f6871dcad7bd6f728d72a96cf2d0aafb1428d /src | |
parent | 791d73f0a6eda08057bd5fb57678a954bb4c6732 (diff) | |
download | riscv-isa-manual-ffdd9891d8189cb6acc3ec4e3d6ac68762be264f.zip riscv-isa-manual-ffdd9891d8189cb6acc3ec4e3d6ac68762be264f.tar.gz riscv-isa-manual-ffdd9891d8189cb6acc3ec4e3d6ac68762be264f.tar.bz2 |
Put note to point to current draft of V standard.
Diffstat (limited to 'src')
-rw-r--r-- | src/v.tex | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -1,6 +1,9 @@ \chapter{``V'' Standard Extension for Vector Operations, Version 0.4-DRAFT} \label{sec:bits} +{\bf This version is out-of-date with respect to the current working + group draft, which is now hosted on {\tt https://github.com/riscv/riscv-v-spec}.} + This chapter presents a proposal for the RISC-V base vector instruction-set extension. The base vector extension is intended to provide general support for data-parallel execution within the 32-bit |