Remove old comment and reformat contributors.

Removed an old comment as per Phillip's recommendation and reformatted the
contributors section in the header for easier reading.

2 files changed, 77 insertions, 11 deletions

diff --git a/src/riscv-unprivileged.adoc b/src/riscv-unprivileged.adoc
index 8ce4c1f..839967f 100644
--- a/src/riscv-unprivileged.adoc
+++ b/src/riscv-unprivileged.adoc
@@ -50,13 +50,83 @@ endif::[]
 :csrname: envcfg
 
 _Contributors to all versions of the spec in alphabetical order (please contact editors to suggest
-corrections): Arvind, Krste Asanović, Rimas Avižienis, Jacob Bachmeyer, Christopher F. Batten,
-Allen J. Baum, Abel Bernabeu, Alex Bradbury, Scott Beamer, Preston Briggs, Christopher Celio, Chuanhua
-Chang, David Chisnall, Paul Clayton, Palmer Dabbelt, Ken Dockser, Paul Donahue, Aaron Durbin, Roger Espasa, Greg Favor, Andy Glew, Shaked Flur, Stefan Freudenberger, Marc Gauthier, Andy Glew, Jan Gray, Michael Hamburg, John
-Hauser, John Ingalls, David Horner, Bruce Hoult, Bill Huffman, Alexandre Joannou, Olof Johansson, Ben Keller,
-David Kruckemyer, Tariq Kurd, Yunsup Lee, Paul Loewenstein, Daniel Lustig, Yatin Manerkar, Luc Maranget,
-Margaret Martonosi, Phil McCoy, Christoph Müllner, Joseph Myers, Vijayanand Nagarajan, Rishiyur Nikhil, Jonas Oberhauser, Stefan O'Rear, Albert Ou, John Ousterhout, David Patterson, Christopher Pulte, Jose Renau,
-Josh Scheid, Colin Schmidt, Peter Sewell, Susmit Sarkar, Ved Shanbhogue, Brendan Sweeney, Michael Taylor, Wesley Terpstra, Matt Thomas, Tommy Thorn, Philipp Tomsich, Caroline Trippel, Ray VanDeWalker, Muralidaran Vijayaraghavan, Megan Wachs, Paul Wamsley Andrew Waterman, Robert Watson, David Weaver, Derek Williams, Andrew Wright, Reinoud Zandijk,
+corrections): Arvind,
+ Krste Asanović, 
+ Rimas Avižienis, 
+Jacob Bachmeyer, 
+Christopher F. Batten, 
+Allen J. Baum, 
+Abel Bernabeu, 
+Alex Bradbury, 
+Scott Beamer, 
+Preston Briggs, 
+Christopher Celio, 
+Chuanhua Chang, 
+David Chisnall, 
+Paul Clayton, 
+Palmer Dabbelt, 
+Ken Dockser, 
+Paul Donahue, 
+Aaron Durbin, 
+Roger Espasa, 
+Greg Favor, 
+Andy Glew, 
+Shaked Flur, 
+Stefan Freudenberger, 
+Marc Gauthier, 
+Andy Glew, 
+Jan Gray, 
+Michael Hamburg, 
+John Hauser, 
+John Ingalls, 
+David Horner, 
+Bruce Hoult, 
+Bill Huffman, 
+Alexandre Joannou, 
+Olof Johansson, 
+Ben Keller, 
+David Kruckemyer, 
+Tariq Kurd, 
+Yunsup Lee, 
+Paul Loewenstein, 
+Daniel Lustig, 
+Yatin Manerkar, 
+Luc Maranget, 
+Margaret Martonosi, 
+Phil McCoy, 
+Christoph Müllner, 
+Joseph Myers, 
+Vijayanand Nagarajan, 
+Rishiyur Nikhil, 
+Jonas Oberhauser, 
+Stefan O'Rear, 
+Albert Ou, 
+John Ousterhout, 
+David Patterson, 
+Christopher Pulte, 
+Jose Renau, 
+Josh Scheid, 
+Colin Schmidt, 
+Peter Sewell, 
+Susmit Sarkar, 
+Ved Shanbhogue, 
+Brendan Sweeney, 
+Michael Taylor, 
+Wesley Terpstra, 
+Matt Thomas, 
+Tommy Thorn, 
+Philipp Tomsich, 
+Caroline Trippel, 
+Ray VanDeWalker, 
+Muralidaran Vijayaraghavan, 
+Megan Wachs, 
+Paul Wamsley, 
+Andrew Waterman, 
+Robert Watson, 
+David Weaver, 
+Derek Williams, 
+Andrew Wright, 
+Reinoud Zandijk,
 and Sizhuo Zhang._
 
 _This document is released under a Creative Commons Attribution 4.0 International License._
diff --git a/src/zicond.adoc b/src/zicond.adoc
index 6b8e275..d7bc78e 100644
--- a/src/zicond.adoc
+++ b/src/zicond.adoc
@@ -7,10 +7,6 @@ The Zicond extension defines a simple solution that provides most of the benefit
 The instructions follow the format for R-type instructions with 3 operands (i.e., 2 source operands and 1 destination operand).
 Using these instructions, branchless sequences can be implemented (typically in two-instruction sequences) without the need for instruction fusion, special provisions during the decoding of architectural instructions, or other microarchitectural provisions.
 
-// === Suitability for Fast Track Extension Process
-// This proposed extension meets the Fast Track criteria: it consists of two, simple R-form instructions, it addresses a wide range of use-cases f// or branchless sequences, it composes with the existing RISC-V instruction set, and is not expected to be contentious.
-
-==== Motivation and use cases
 One of the shortcomings of RISC-V, compared to competing instruction set architectures, is the absence of conditional operations to support branchless code-generation: this includes conditional arithmetic, conditional select and conditional move operations.
 The design principles of RISC-V (e.g. the absence of an instruction-format that supports 3 source registers and an output register) make it unlikely that direct equivalents of the competing instructions will be introduced.