Embellish descriptions in Q chapter

1 files changed, 10 insertions, 4 deletions

diff --git a/src/q.tex b/src/q.tex
index 1d73504..53c21ad 100644
--- a/src/q.tex
+++ b/src/q.tex
@@ -4,8 +4,9 @@
 This chapter describes the Q standard extension for 128-bit quad-precision binary
 floating-point instructions compliant with the IEEE 754-2008
 arithmetic standard. The quad-precision binary
-floating-point instruction-set extension is named ``Q'', and requires
-RV64IFD.  The floating-point registers are now extended to hold either
+floating-point instruction-set extension is named ``Q''; it depends
+on the double-precision floating-point extension D.
+The floating-point registers are now extended to hold either
 a single, double, or quad-precision floating-point value (FLEN=128).
 The NaN-boxing scheme described in Section~\ref{nanboxing} is now
 extended recursively to allow a single-precision value to be NaN-boxed
@@ -186,8 +187,13 @@ FCVT.Q.{\em int} & Q & W[U]/L[U] & src & RM  & dest & OP-FP  \\
 \end{tabular}
 \end{center}
 
-New floating-point to floating-point conversion instructions FCVT.S.Q,
-FCVT.Q.S, FCVT.D.Q, FCVT.Q.D are added.
+New floating-point-to-floating-point conversion instructions are added.  These
+instructions are defined analogously to the double-precision floating-point-to-floating-point
+conversion instructions.  FCVT.S.Q or FCVT.Q.S converts a quad-precision
+floating-point number to a single-precision floating-point number, or
+vice-versa, respectively.  FCVT.D.Q or FCVT.Q.D converts a quad-precision
+floating-point number to a double-precision floating-point number, or
+vice-versa, respectively.
 
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 \begin{center}