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authorAndrew Waterman <andrew@sifive.com>2021-09-15 18:27:36 -0700
committerAndrew Waterman <andrew@sifive.com>2021-09-15 18:27:36 -0700
commit04cc07bccea63f6587371b6c75b228af3e5ebb02 (patch)
treeab3406638a7aeebca3f36e04848727e463ce0697 /src
parent1baed5acc5d43a41531b132c3974c4b17aee587f (diff)
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Priv-1.12 spec for public reviewriscv-privileged-20210915-public-review
Diffstat (limited to 'src')
-rw-r--r--src/priv-preface.tex11
-rw-r--r--src/riscv-privileged.tex4
2 files changed, 7 insertions, 8 deletions
diff --git a/src/priv-preface.tex b/src/priv-preface.tex
index 4e59093..44cfc29 100644
--- a/src/priv-preface.tex
+++ b/src/priv-preface.tex
@@ -1,9 +1,8 @@
\chapter{Preface}
-This is {\bf a draft of} version 1.12 of the RISC-V privileged
-architecture proposal.
-The document contains the following versions of the RISC-V ISA
-modules:
+This document describes the RISC-V privileged architecture. This
+release, version \privrev, will be used for public review of the
+following modules:
{
\begin{table}[hbt]
@@ -12,8 +11,8 @@ modules:
\hline
Module & Version & Status\\
\hline
- \em Machine ISA & \em 1.12 & \em Draft \\
- \em Supervisor ISA & \em 1.12 & \em Draft \\
+ \em Machine ISA & \em 1.12 & \em Frozen \\
+ \em Supervisor ISA & \em 1.12 & \em Frozen \\
\em Hypervisor ISA & \em 1.0 & \em Frozen \\
\hline
\end{tabular}
diff --git a/src/riscv-privileged.tex b/src/riscv-privileged.tex
index 36e4eef..bf71aed 100644
--- a/src/riscv-privileged.tex
+++ b/src/riscv-privileged.tex
@@ -10,8 +10,8 @@
\input{preamble}
-\newcommand{\privrev}{1.12-draft}
-\newcommand{\privmonthyear}{June 2019}
+\newcommand{\privrev}{20210915-Public-Review-{\em draft}}
+\newcommand{\privmonthyear}{September 2021}
\setcounter{secnumdepth}{3}
\setcounter{tocdepth}{3}