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author | Andrew Waterman <andrew@sifive.com> | 2021-06-14 01:10:07 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-08-02 16:46:30 -0700 |
commit | 1c02a1ff0a8eea05ac7192bc54e15a6f35ac9da4 (patch) | |
tree | 76426731ce0c4d15fa14eee54ff1652e38bef3b0 /src/zfinx.tex | |
parent | 3588b3a62ebec5039ee4ee473a6e935097146d78 (diff) | |
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Add Zhinxmin
Diffstat (limited to 'src/zfinx.tex')
-rw-r--r-- | src/zfinx.tex | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/zfinx.tex b/src/zfinx.tex index 3fcf9b9..404bac2 100644 --- a/src/zfinx.tex +++ b/src/zfinx.tex @@ -70,6 +70,17 @@ The Zhinx variants of these Zfh-extension instructions have the same semantics, except that whenever such an instruction would have accessed an {\tt f} register, it instead accesses the {\tt x} register with the same number. +\section{Zhinxmin} + +The Zhinxmin extension provides minimal support for 16-bit half-precision +floating-point instructions that operate on the {\tt x} registers. +The Zhinxmin extension requires the Zfinx extension. + +The Zhinxmin extension includes the following instructions from the Zhinx +extension: FCVT.S.H and FCVT.H.S. +If the Zdinx extension is present, the FCVT.D.H and FCVT.H.D instructions are +also included. + \section{Zdinx} The Zdinx extension provides analogous double-precision floating-point |