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| author | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-05-03 07:48:04 -0700 |
|---|---|---|
| committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-05-03 07:48:04 -0700 |
| commit | ccf18a8bfcd5baedbba7c097178dc12b2164f77b (patch) | |
| tree | 902737e18778970e1355c3edd80788c91e097b16 /src/v.tex | |
| parent | 59a592042c16699726b86ead4dfa16d63277e839 (diff) | |
| download | riscv-isa-manual-ccf18a8bfcd5baedbba7c097178dc12b2164f77b.zip riscv-isa-manual-ccf18a8bfcd5baedbba7c097178dc12b2164f77b.tar.gz riscv-isa-manual-ccf18a8bfcd5baedbba7c097178dc12b2164f77b.tar.bz2 | |
Moved chapters into canonical extension listing order.
Diffstat (limited to 'src/v.tex')
| -rw-r--r-- | src/v.tex | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -1,4 +1,4 @@ -\chapter{``V'' Standard Extension for Vector Operations, Version 0.1} +\chapter{``V'' Standard Extension for Vector Operations, Version 0.2} \label{sec:bits} This chapter presents a proposal for the RISC-V vector instruction set |