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authorAndrew Waterman <andrew@sifive.com>2017-03-13 13:13:09 -0700
committerAndrew Waterman <andrew@sifive.com>2017-03-13 13:13:09 -0700
commit7b7361ae364cb3a7268c3a5abb61b1caac8fa7fe (patch)
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parent4bba8d8c27f5c02af26bc926123d4a25ffe4f9d0 (diff)
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Fix setvl description
Closes #28, thanks @asb.
Diffstat (limited to 'src/v.tex')
-rw-r--r--src/v.tex8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/v.tex b/src/v.tex
index 29d4144..95a80ce 100644
--- a/src/v.tex
+++ b/src/v.tex
@@ -314,10 +314,10 @@ integer. The {\tt setvl} instruction calculates the value to assign to
Similar rules were previously used in Cray-designed machines~\cite{crayx1asm}.
\end{commentary}
-The {\tt vl} register is updated with the minimum of AVL and
-MVL, and this value is also returned as the result of the {\tt setvl}
-instruction. Note that unlike a regular {\tt csrrw} instruction, the
-value returned is not the original CSR value but the modified value.
+The result of this calculation is also returned as the result of the {\tt
+setvl} instruction. Note that unlike a regular {\tt csrrw} instruction, the
+value written to integer register {\em rd} is not the original CSR value but
+the modified value.
\begin{commentary}
The idea of having implementation-defined vector length dates back