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| author | Andrew Waterman <andrew@sifive.com> | 2017-02-24 19:57:44 -0800 |
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| committer | Andrew Waterman <andrew@sifive.com> | 2017-02-24 19:57:44 -0800 |
| commit | 5280f83dc6d15212efff1f5c34a4dbd687fa09d5 (patch) | |
| tree | c83ecdcdf3ab2d91f17ed0095362b11af48edd1d /src/supervisor.tex | |
| parent | 4ef6b540c44abddaf896b6a0f3167c359f3a708d (diff) | |
| download | riscv-isa-manual-5280f83dc6d15212efff1f5c34a4dbd687fa09d5.zip riscv-isa-manual-5280f83dc6d15212efff1f5c34a4dbd687fa09d5.tar.gz riscv-isa-manual-5280f83dc6d15212efff1f5c34a4dbd687fa09d5.tar.bz2 | |
Incorporate most of Hauser's feedback
Diffstat (limited to 'src/supervisor.tex')
| -rw-r--r-- | src/supervisor.tex | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex index 8cd7a8a..7d3813e 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -124,6 +124,16 @@ sstatus} is equivalent to reading or writing the homonymous field in {\tt mstatus}. \end{commentary} +\subsection{Base ISA Control in {\tt sstatus} Register} + +The UX field controls the value of XLEN for U-mode. The encoding of UX is the +same as that of the Base field of {\tt misa}, shown in Table~\ref{misabase}. +This field only exists for RV64 and RV128; RV32 machines always use RV32 for +U-mode. An implementation may limit the values to which UX can be set, but +U-mode XLEN must not exceed S-mode XLEN. + +\note{AW: add this to sstatus figure} + \subsection{Memory Privilege in {\tt sstatus} Register} \label{sec:pum} |