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author | Andrew Waterman <andrew@sifive.com> | 2017-05-05 15:39:01 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-05-05 15:39:01 -0700 |
commit | 326bec83de23f4d2daf24cfed6b5251748cad632 (patch) | |
tree | 662478bcf952f9ad9d18ce900147d3e476b54939 /src/supervisor.tex | |
parent | 5a32fe87820f2f0f7ffab16a4a33906e78e26abb (diff) | |
download | riscv-isa-manual-326bec83de23f4d2daf24cfed6b5251748cad632.zip riscv-isa-manual-326bec83de23f4d2daf24cfed6b5251748cad632.tar.gz riscv-isa-manual-326bec83de23f4d2daf24cfed6b5251748cad632.tar.bz2 |
Remove option to hardwire UXL/SXL to 0
Diffstat (limited to 'src/supervisor.tex')
-rw-r--r-- | src/supervisor.tex | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex index 2db7c61..9aa0cdb 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -191,10 +191,13 @@ sstatus} is equivalent to reading or writing the homonymous field in The UXL field controls the value of XLEN for U-mode, termed {\em U-XLEN}, which may differ from the value of XLEN for S-mode, termed {\em S-XLEN}. The encoding of UXL is the same as that of the MXL field of {\tt misa}, shown in -Table~\ref{misabase}. This field only exists for RV64 and RV128; RV32 -machines always use RV32 for U-mode. UXL is a \warl\ field, and an -implementation may hard-wire UXL to zero, in which case U-XLEN~=~S-XLEN. If -U-XLEN~$\ne$~S-XLEN, instructions executed in the narrower mode must ignore +Table~\ref{misabase}. + +For RV32 systems, the UXL field does not exist, and U-XLEN~=~32. For RV64 and +RV128 systems, it is a \warl\ field that encodes the current value of U-XLEN. +In particular, the implementation may hardwire UXL so that U-XLEN~=~S-XLEN. + +If U-XLEN~$\ne$~S-XLEN, instructions executed in the narrower mode must ignore source register operand bits above the configured XLEN, and must sign-extend results to fill the widest supported XLEN in the destination register. |