diff options
author | Andrew Waterman <andrew@sifive.com> | 2017-11-09 11:00:39 -0800 |
---|---|---|
committer | Andrew Waterman <andrew@sifive.com> | 2017-11-09 11:00:58 -0800 |
commit | 14e18f2036c82943e52ca8bf630fd8e4f53b7e4a (patch) | |
tree | b93f377af0c6947b9cfb5088dcfb037f3dc4ffcc /src/supervisor.tex | |
parent | 7cf3673198998d38b7235c879974cdcfa0912031 (diff) | |
download | riscv-isa-manual-14e18f2036c82943e52ca8bf630fd8e4f53b7e4a.zip riscv-isa-manual-14e18f2036c82943e52ca8bf630fd8e4f53b7e4a.tar.gz riscv-isa-manual-14e18f2036c82943e52ca8bf630fd8e4f53b7e4a.tar.bz2 |
fix typos
Diffstat (limited to 'src/supervisor.tex')
-rw-r--r-- | src/supervisor.tex | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex index c894ba5..d10cf0a 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -418,7 +418,7 @@ The UEIP field in {\tt sip} contains a single read-write bit. UEIP may be written by S-mode software to indicate to U-mode that an external interrupt is pending. Additionally, the platform-level interrupt controller may generate user-level external interrupts. The -logical-OR of the software-writeable bit and the signal from the +logical-OR of the software-writable bit and the signal from the external interrupt controller are used to generate external interrupts for user mode. When the UEIP bit is read with a CSRRW, CSRRS, or CSRRC instruction, the value returned in the {\tt rd} destination @@ -715,7 +715,7 @@ smaller of XLEN and the width of the longest supported instruction. \label{sec:satp} The {\tt satp} register is an XLEN-bit read/write register, formatted as shown -in Figure~\ref{rv32satp} for RV32 and Figure~\ref{rv64satp}, which +in Figure~\ref{rv32satp} for RV32 and Figure~\ref{rv64satp} for RV64, which controls supervisor-mode address translation and protection. This register holds the physical page number (PPN) of the root page table, i.e., its supervisor physical address divided by \wunits{4}{KiB}; @@ -767,7 +767,7 @@ a physical address space larger than \wunits{4}{GiB} for RV32. } \vspace{-0.1in} \caption{RV64 Supervisor address translation and protection register {\tt satp}, for MODE -values Sv39 and Sv48.} +values Bare, Sv39, and Sv48.} \label{rv64satp} \end{figure} |