Merge branch 'virtual-memory' into Svnapot

1 files changed, 2 insertions, 2 deletions

diff --git a/src/rvwmo.tex b/src/rvwmo.tex
index edf3f28..228e582 100644
--- a/src/rvwmo.tex
+++ b/src/rvwmo.tex
@@ -35,7 +35,7 @@ The {\em program order} over memory operations reflects the order in which the i
 
 Memory-accessing instructions give rise to {\em memory operations}.
 A memory operation can be either a {\em load operation}, a {\em store operation}, or both simultaneously.
-All memory operations are single-copy atomic: they can never be observed in a partially-complete state.
+All memory operations are single-copy atomic: they can never be observed in a partially complete state.
 
 Among instructions in RV32GC and RV64GC, each aligned memory instruction gives rise to exactly one memory operation, with two exceptions.
 First, an unsuccessful SC instruction does not give rise to any memory operations.
@@ -70,7 +70,7 @@ An ``RCpc annotation'' refers to an acquire-RCpc annotation or a release-RCpc an
 An ``RCsc annotation'' refers to an acquire-RCsc annotation or a release-RCsc annotation.
 
 \begin{commentary}
-  In the memory model literature, the term ``RCpc'' stands for release consistency with processor-consistent synchronization operations, and the term ``RCsc'' stands for release consistency with sequentially-consistent synchronization operations~\cite{Gharachorloo90memoryconsistency}.
+  In the memory model literature, the term ``RCpc'' stands for release consistency with processor-consistent synchronization operations, and the term ``RCsc'' stands for release consistency with sequentially consistent synchronization operations~\cite{Gharachorloo90memoryconsistency}.
 
   While there are many different definitions for acquire and release annotations in the literature, in the context of RVWMO these terms are concisely and completely defined by Preserved Program Order rules \ref{ppo:acquire}--\ref{ppo:rcsc}.