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| author | Bill Traynor <wmat@riscv.org> | 2022-12-07 10:47:48 -0500 |
|---|---|---|
| committer | Bill Traynor <wmat@riscv.org> | 2022-12-07 10:47:48 -0500 |
| commit | ea3ff53b17c53ee49a40081418dbfc217631e642 (patch) | |
| tree | 3ede552135e6609148fb897c3893012487d8148c /src/rvwmo.adoc | |
| parent | 0f3e2d144c8c6faf9e1871bc8203d9fdd76846db (diff) | |
| download | riscv-isa-manual-ea3ff53b17c53ee49a40081418dbfc217631e642.zip riscv-isa-manual-ea3ff53b17c53ee49a40081418dbfc217631e642.tar.gz riscv-isa-manual-ea3ff53b17c53ee49a40081418dbfc217631e642.tar.bz2 | |
Various Ch. 17 updates.
Added a missing ref.
Updated some spacing in tables.
Diffstat (limited to 'src/rvwmo.adoc')
| -rw-r--r-- | src/rvwmo.adoc | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/src/rvwmo.adoc b/src/rvwmo.adoc index 5ba5537..4bdfbe9 100644 --- a/src/rvwmo.adoc +++ b/src/rvwmo.adoc @@ -154,7 +154,7 @@ consistent synchronization operations. While there are many different definitions for acquire and release annotations in the literature, in the context of RVWMO these terms are -concisely and completely defined by Preserved Program Order rules +concisely and completely defined by <<ppo, Preserved Program Order>> rules 5-7. *RCpc* annotations are currently only used when implicitly assigned to @@ -270,7 +270,7 @@ program order. ==== ==== Preserved Program Order - +[[ppo]] The global memory order for any given execution of a program respects some but not all of each hart’s program order. The subset of program order that must be respected by the global memory order is known as @@ -358,11 +358,13 @@ _s_ must precede _w_ in the global memory order, and there can be no store from a hart other than _h_ to byte _x_ following _s_ and preceding _w_ in the global memory order. - -The theoretically supports LR/SC pairs of different widths and to +[NOTE] +==== +The <<ax-atom>> theoretically supports LR/SC pairs of different widths and to mismatched addresses, since implementations are permitted to allow SC operations to succeed in such cases. However, in practice, we expect such patterns to be rare, and their use is discouraged. +==== [[ax-prog]] ===== Progress Axiom @@ -374,7 +376,7 @@ infinite sequence of other memory operations. === CSR Dependency Tracking Granularity .Granularities at which syntactic dependencies are tracked through CSRs -[cols="<,<,<",options="header",] +[cols="<1,<4,<1",options="header",] |=== |Name |Portions Tracked as Independent Units |Aliases |_fflags_ |Bits 4, 3, 2, 1, 0 |_fcsr_ @@ -406,14 +408,14 @@ except where annotated otherwise. Key: -- ^A^: Address source register +- ^A^Address source register -- ^D^: Data source register +- ^D^Data source register -- latexmath:[$^\dagger$]: The instruction does not carry a dependency from +- latexmath:[$^\dagger$]The instruction does not carry a dependency from any source register to any destination register -- latexmath:[$^\ddagger$]: The instruction carries dependencies from source +- latexmath:[$^\ddagger$]The instruction carries dependencies from source register(s) to destination register(s) as specified .RV32I Base Integer Instruction Set |