Pmp wording fix (#545)

* Consistently use "access-fault exception" for PMPs

Except for discussions of the xcause code itself which are "access
fault".

* Clarify behavior of locked TOR PMPs

1 files changed, 12 insertions, 11 deletions

diff --git a/src/rv32.tex b/src/rv32.tex
index dc5e36d..bb7348b 100644
--- a/src/rv32.tex
+++ b/src/rv32.tex
@@ -696,9 +696,9 @@ unconditional jumps and conditional branches.  Control transfer
 instructions in RV32I do {\em not} have architecturally visible delay
 slots.
 
-If an instruction access exception or instruction page fault occurs on the
-target of a jump or taken branch, the exception is reported on the target
-instruction, not on the jump or branch instruction.
+If an instruction access-fault or instruction page-fault exception occurs
+on the target of a jump or taken branch, the exception is reported on the
+target instruction, not on the jump or branch instruction.
 
 \subsubsection*{Unconditional Jumps}
 
@@ -1106,14 +1106,15 @@ invisibly.  In this case, loads and stores that are not naturally
 aligned may either complete execution successfully or raise an
 exception.  The exception raised can be either an address-misaligned
 exception or an access-fault exception.  For a memory access that would
-otherwise be able to complete except for the misalignment, an access
-exception can be raised instead of an address-misaligned exception if
-the misaligned access should not be emulated, e.g., if accesses to the
-memory region have side effects.  When an EEI does not guarantee
-misaligned loads and stores are handled invisibly, the EEI must define
-if exceptions caused by address misalignment result in a contained
-trap (allowing software running inside the execution environment to
-handle the trap) or a fatal trap (terminating execution).
+otherwise be able to complete except for the misalignment, an
+access-fault exception can be raised instead of an address-misaligned
+exception if the misaligned access should not be emulated, e.g., if
+accesses to the memory region have side effects.  When an EEI does not
+guarantee misaligned loads and stores are handled invisibly, the EEI
+must define if exceptions caused by address misalignment result in a
+contained trap (allowing software running inside the execution
+environment to handle the trap) or a fatal trap (terminating
+execution).
 
 \begin{commentary}
 Misaligned accesses are occasionally required when porting legacy