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| author | Andrew Waterman <andrew@sifive.com> | 2019-10-22 12:45:04 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-10-22 12:45:04 -0700 |
| commit | 30cf837f9922af4bf9a768cb876e8f45170c4ccc (patch) | |
| tree | 416b9bdb90c6d502d9c1954c7fbc88e49b507f01 /src/rv32.tex | |
| parent | d4647022521de88d8bccf59af6de415f8db1388d (diff) | |
| download | riscv-isa-manual-30cf837f9922af4bf9a768cb876e8f45170c4ccc.zip riscv-isa-manual-30cf837f9922af4bf9a768cb876e8f45170c4ccc.tar.gz riscv-isa-manual-30cf837f9922af4bf9a768cb876e8f45170c4ccc.tar.bz2 | |
Add platform note about UNSPECIFIED behavior decoding reserved opcodes
Diffstat (limited to 'src/rv32.tex')
| -rw-r--r-- | src/rv32.tex | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/rv32.tex b/src/rv32.tex index 7229685..a4bfd87 100644 --- a/src/rv32.tex +++ b/src/rv32.tex @@ -163,6 +163,12 @@ are the only places where misalignment can occur. \end{commentary} The behavior upon decoding a reserved instruction is \unspecified. +\begin{commentary} +Some platforms may require that opcodes reserved for standard use raise +an illegal-instruction exception. +Other platforms may permit reserved opcode space be used for non-conforming +extensions. +\end{commentary} \vspace{-0.2in} \begin{figure}[h] |