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author | Andrew Waterman <andrew@sifive.com> | 2023-10-30 14:12:52 -0700 |
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committer | GitHub <noreply@github.com> | 2023-10-30 14:12:52 -0700 |
commit | 5540081f58c2c948dc09f395735a5e0e6fcaf47b (patch) | |
tree | 0f5f2755fabc3c8a2008086e263777c51c40d26d /src/priv-preface.adoc | |
parent | cd30ad51f1b282a3b409bd803bc02a0e03afbbf2 (diff) | |
download | riscv-isa-manual-5540081f58c2c948dc09f395735a5e0e6fcaf47b.zip riscv-isa-manual-5540081f58c2c948dc09f395735a5e0e6fcaf47b.tar.gz riscv-isa-manual-5540081f58c2c948dc09f395735a5e0e6fcaf47b.tar.bz2 |
Specify SFENCE/HFENCE requirements when changing PBMTE (#1111)
Diffstat (limited to 'src/priv-preface.adoc')
-rw-r--r-- | src/priv-preface.adoc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/priv-preface.adoc b/src/priv-preface.adoc index b518d2d..d1ccfcb 100644 --- a/src/priv-preface.adoc +++ b/src/priv-preface.adoc @@ -36,6 +36,8 @@ version 1.12: * Defined the `misa`.V field to reflect that the V extension has been implemented. +* Specified synchronization requirements when changing the PBMTE fields +in `menvcfg` and `henvcfg`. * Clarified semantics of explicit accesses to CSRs wider than XLEN bits. * Clarified that MXLEN≥SXLEN, and added the constraint that SXLEN≥UXLEN. |