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| author | Andrew Waterman <andrew@sifive.com> | 2018-12-02 22:15:02 -0800 |
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| committer | Andrew Waterman <andrew@sifive.com> | 2018-12-02 22:15:02 -0800 |
| commit | fc41db64f3cf618534adf02422db1ea4deb3ce4f (patch) | |
| tree | 96422ab5bd7b78d01edc22663cfe27a7d4e362a8 /src/priv-intro.tex | |
| parent | 296fad700431eaa525ab83b8d6c30dfcd9509661 (diff) | |
| download | riscv-isa-manual-fc41db64f3cf618534adf02422db1ea4deb3ce4f.zip riscv-isa-manual-fc41db64f3cf618534adf02422db1ea4deb3ce4f.tar.gz riscv-isa-manual-fc41db64f3cf618534adf02422db1ea4deb3ce4f.tar.bz2 | |
WIP on M-mode chapter
Diffstat (limited to 'src/priv-intro.tex')
| -rw-r--r-- | src/priv-intro.tex | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/src/priv-intro.tex b/src/priv-intro.tex index 723b9b4..7787f69 100644 --- a/src/priv-intro.tex +++ b/src/priv-intro.tex @@ -142,18 +142,6 @@ manage secure execution environments on RISC-V. User-mode (U-mode) and supervisor-mode (S-mode) are intended for conventional application and operating system usage respectively. -\begin{commentary} -The previous Hypervisor mode (H-mode) designed to support Type-1 -hypervisors has been removed and the encoding space reserved as we are -focusing on hypervisor support via an extended S mode suitable for -both Type-1 and Type-2 hypervisors as described in -Chapter~\ref{hypervisor}. The encoding space for H is reserved for -future use and to avoid backwards incompatible changes in bit -positions in various status registers. The bit positions might be -reused in the future for different Type-1 hypervisor support or -possibly additional secure execution modes. -\end{commentary} - Each privilege level has a core set of privileged ISA extensions with optional extensions and variants. For example, machine-mode supports an optional standard extension for memory protection. Also, supervisor mode can be |