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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-12-03 18:31:37 -0800 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-12-03 18:31:37 -0800 |
commit | 63e1c484ccaefad01ffc8cfe2c86438bcfbb7bd3 (patch) | |
tree | 370643cdc044a8f5927158178ed0a0ee574ec2b7 /src/priv-intro.tex | |
parent | a5793260d9e157e468fde60ffa2d61abaa4913bb (diff) | |
download | riscv-isa-manual-63e1c484ccaefad01ffc8cfe2c86438bcfbb7bd3.zip riscv-isa-manual-63e1c484ccaefad01ffc8cfe2c86438bcfbb7bd3.tar.gz riscv-isa-manual-63e1c484ccaefad01ffc8cfe2c86438bcfbb7bd3.tar.bz2 |
Made clear this document written as if only privileged architecture.
Minor clarifications.
Diffstat (limited to 'src/priv-intro.tex')
-rw-r--r-- | src/priv-intro.tex | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/src/priv-intro.tex b/src/priv-intro.tex index 7787f69..f909ea6 100644 --- a/src/priv-intro.tex +++ b/src/priv-intro.tex @@ -19,7 +19,9 @@ possibly without even changing the ABI. In particular, this privileged specification was designed to run existing popular operating systems, and so embodies the conventional level-based protection model. Alternate privileged specifications could embody -other more flexible protection-domain models. +other more flexible protection-domain models. For simplicity of +expression, the text is written as if this was the only possible +privileged architecture. \end{commentary} \section{RISC-V Privileged Software Stack Terminology} @@ -121,17 +123,17 @@ be raised. These exceptions will normally cause traps into an underlying execution environment. \begin{commentary} -In the description, we try to separate the {\em privilege level} for -which code is written, from the {\em privilege mode} in which it runs, -although the two are often tied. For example, a supervisor-level -operating system can run in supervisor-mode on a system with three -privilege modes, but can also run in user-mode under a classic virtual -machine monitor on systems with two or more privilege modes. In both -cases, the same supervisor-level operating system binary code can be -used, coded to a supervisor-level SBI and hence expecting to be able -to use supervisor-level privileged instructions and CSRs. When -running a guest OS in user mode, all supervisor-level actions will be -trapped and emulated by the SEE running in the higher-privilege level. +In the description, we try to separate the privilege level for which +code is written, from the privilege mode in which it runs, although +the two are often tied. For example, a supervisor-level operating +system can run in supervisor-mode on a system with three privilege +modes, but can also run in user-mode under a classic virtual machine +monitor on systems with two or more privilege modes. In both cases, +the same supervisor-level operating system binary code can be used, +coded to a supervisor-level SBI and hence expecting to be able to use +supervisor-level privileged instructions and CSRs. When running a +guest OS in user mode, all supervisor-level actions will be trapped +and emulated by the SEE running in the higher-privilege level. \end{commentary} The machine level has the highest privileges and is the only mandatory @@ -205,4 +207,4 @@ considered an additional privilege mode, with even more access than M-mode. The separate debug specification proposal describes operation of a RISC-V hart in debug mode. Debug mode reserves a few CSR addresses that are only accessible in D-mode, and may also reserve -some portions of the physical memory space on a platform. +some portions of the physical address space on a platform. |