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| author | Andrew Waterman <andrew@sifive.com> | 2018-04-13 01:41:36 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-04-13 14:08:18 -0700 |
| commit | 21b78674f45740481fdf9a1fdeca790893dfa361 (patch) | |
| tree | 69854303015402e05c8b7343bd900cf7c747c8c9 /src/priv-csrs.tex | |
| parent | cdb665618383ec40aeac722d0c99a3e46b974a4f (diff) | |
| download | riscv-isa-manual-21b78674f45740481fdf9a1fdeca790893dfa361.zip riscv-isa-manual-21b78674f45740481fdf9a1fdeca790893dfa361.tar.gz riscv-isa-manual-21b78674f45740481fdf9a1fdeca790893dfa361.tar.bz2 | |
Remove hyphen from M-XLEN etc.
Diffstat (limited to 'src/priv-csrs.tex')
| -rw-r--r-- | src/priv-csrs.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/priv-csrs.tex b/src/priv-csrs.tex index 3dc2613..1603185 100644 --- a/src/priv-csrs.tex +++ b/src/priv-csrs.tex @@ -439,7 +439,7 @@ value is written. \section{CSR Width Modulation} -If the width of a CSR is changed (for example, by changing M-XLEN or U-XLEN, as +If the width of a CSR is changed (for example, by changing MXLEN or UXLEN, as described in Section~\ref{xlen-control}), the values of the {\em writable} fields and bits of the new-width CSR are, unless specified otherwise, determined from the previous-width CSR as though by this algorithm: |