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| author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-11-03 16:25:17 -0700 |
|---|---|---|
| committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-11-03 16:25:17 -0700 |
| commit | 9bad4e100b35aa21e337a1516a7a644a83f8c645 (patch) | |
| tree | d044b43ef5b1483ab49d9b4b851b3031cea9a324 /src/preface.tex | |
| parent | ebe1ca4d98294254335d17a7502597b38be5be5e (diff) | |
| download | riscv-isa-manual-9bad4e100b35aa21e337a1516a7a644a83f8c645.zip riscv-isa-manual-9bad4e100b35aa21e337a1516a7a644a83f8c645.tar.gz riscv-isa-manual-9bad4e100b35aa21e337a1516a7a644a83f8c645.tar.bz2 | |
Removed text regarding big or bi-endian operation. For now, only specifying little-endian operation.
Diffstat (limited to 'src/preface.tex')
| -rw-r--r-- | src/preface.tex | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/preface.tex b/src/preface.tex index 5654539..3d0569b 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -59,6 +59,8 @@ The major changes in this version of the document include: \item Defined instruction-set categories: {\em standard}, {\em reserved}, {\em custom}, {\em non-standard}, and {\em non-conforming}. +\item Removed text implying operation under alternate endianess, as + alternate-endianess operation has not yet been defined for RISC-V. \item Changed description of misaligned load and store behavior to match change that this is now an unprivileged ISA manual not a user ISA manual. Now allows visible misaligned address traps in |