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| author | Andrew Waterman <andrew@sifive.com> | 2017-02-02 18:43:53 -0800 |
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| committer | Andrew Waterman <andrew@sifive.com> | 2017-02-02 18:43:53 -0800 |
| commit | 6b822b68962fb190bfb6d1ab7695284e74c1ba65 (patch) | |
| tree | 76ff7dc642b77f9927f478f16a3ce140ed705344 /src/preface.tex | |
| parent | 30b118b58e2fa8cdf4cb2d34c07cc35cfec65f92 (diff) | |
| download | riscv-isa-manual-6b822b68962fb190bfb6d1ab7695284e74c1ba65.zip riscv-isa-manual-6b822b68962fb190bfb6d1ab7695284e74c1ba65.tar.gz riscv-isa-manual-6b822b68962fb190bfb6d1ab7695284e74c1ba65.tar.bz2 | |
Remove calling convention chapter
Diffstat (limited to 'src/preface.tex')
| -rw-r--r-- | src/preface.tex | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/preface.tex b/src/preface.tex index ce3e8df..c0318e5 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -47,6 +47,8 @@ The major changes in this version of the document include: \item An expanded pseudoinstruction listing. \item A new table of control and status register (CSR) mappings. \item Clarification of constraints on load-reserved/store-conditional sequences. +\item Removal of the calling convention chapter, which has been superseded by + the RISC-V ELF psABI Specification~\cite{riscv-elf-psabi}. \end{itemize} \section*{Preface to Document Version 2.1} |