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author | Andrew Waterman <andrew@sifive.com> | 2017-02-02 18:53:23 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-02-02 19:03:09 -0800 |
commit | 5c5fa59c65454a66f7afbf1ca789fab3997e2ef2 (patch) | |
tree | 6cc323d186ad9782e2888069028de2362aa4502e /src/preface.tex | |
parent | 6b822b68962fb190bfb6d1ab7695284e74c1ba65 (diff) | |
download | riscv-isa-manual-5c5fa59c65454a66f7afbf1ca789fab3997e2ef2.zip riscv-isa-manual-5c5fa59c65454a66f7afbf1ca789fab3997e2ef2.tar.gz riscv-isa-manual-5c5fa59c65454a66f7afbf1ca789fab3997e2ef2.tar.bz2 |
Clarify behavior of FCSR MSBs
Diffstat (limited to 'src/preface.tex')
-rw-r--r-- | src/preface.tex | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/preface.tex b/src/preface.tex index c0318e5..573fa01 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -41,6 +41,7 @@ The major changes in this version of the document include: \itemsep 1pt \item Improvements to the description and commentary. \item Clarified behavior of FSGNJ.D instruction on single-precision inputs. +\item Clarified purpose and behavior of high-order bits of {\tt fcsr}. \item Corrected the description of the FNMADD.{\em fmt} and FNMSUB.{\em fmt} instructions, which had suggested the incorrect sign of a zero result. \item A draft proposal of the V vector instruction set extension. |