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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-05-03 07:40:51 -0700 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-05-03 07:40:51 -0700 |
commit | 5d4a9cfe25dba165c1e04e1140adf9f8fdbcc058 (patch) | |
tree | 2092670cc07aece7e42aa753665ae4bfc4a51d2e /src/preface.tex | |
parent | 8ca7cc545451f97b8941f19c5ca7fcc05494df40 (diff) | |
download | riscv-isa-manual-5d4a9cfe25dba165c1e04e1140adf9f8fdbcc058.zip riscv-isa-manual-5d4a9cfe25dba165c1e04e1140adf9f8fdbcc058.tar.gz riscv-isa-manual-5d4a9cfe25dba165c1e04e1140adf9f8fdbcc058.tar.bz2 |
Reordered chapters to be somewhat more logical.
Diffstat (limited to 'src/preface.tex')
-rw-r--r-- | src/preface.tex | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/preface.tex b/src/preface.tex index 50832ef..940d00f 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -34,7 +34,8 @@ versions of the RISC-V ISA modules: To date, no parts of the standard have been officially ratified by the RISC-V Foundation, but the components labeled ``frozen'' above are not -expected to change during the ratification process. +expected to change during the ratification process beyond resolving +ambiguities and holes in the specification. The major changes in this version of the document include: \begin{itemize} |