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| author | Daniel Lustig <dlustig@princeton.edu> | 2018-09-18 09:54:54 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-09-18 09:54:54 -0700 |
| commit | 3318c9e5c2594a64b19dcb6a6e3e0adc66172874 (patch) | |
| tree | 2891316ca4958c6d2abb24284862405388dcf790 /src/memory.tex | |
| parent | 03a079586fcbcd37ae1728e716dfc3f9b633c996 (diff) | |
| download | riscv-isa-manual-3318c9e5c2594a64b19dcb6a6e3e0adc66172874.zip riscv-isa-manual-3318c9e5c2594a64b19dcb6a6e3e0adc66172874.tar.gz riscv-isa-manual-3318c9e5c2594a64b19dcb6a6e3e0adc66172874.tar.bz2 | |
Fix Figure A.2 to make it draw the correct test (#228)
Luc had provided the correct figure originally, but I must have messed
something up in the merge upstream. This restores the correct figure.
Diffstat (limited to 'src/memory.tex')
| -rw-r--r-- | src/memory.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/memory.tex b/src/memory.tex index 619bd38..5d96bc7 100644 --- a/src/memory.tex +++ b/src/memory.tex @@ -154,7 +154,7 @@ Any other hart will therefore observe the load as performing before the store. \begin{figure}[h!] \centering - \begin{tabular}{m{.4\linewidth}@{\qquad}m{.4\linewidth}} + \begin{tabular}{m{.4\linewidth}@{\qquad}m{.45\linewidth}} { \tt\small \begin{tabular}{cl||cl} |