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authorAndrew Waterman <andrew@sifive.com>2020-04-14 16:44:23 -0700
committerAndrew Waterman <andrew@sifive.com>2020-04-14 16:44:56 -0700
commitbaea02550976abe89db299bfff01e9ef82b269a3 (patch)
tree94bd3fe284a3c205ac137e884bfc7aeb223b7975 /src/machine.tex
parente16390dc8f53695fad0af532b45ec4c6a2319df4 (diff)
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Avoid "should" when describing a mandate
Resolves #510
Diffstat (limited to 'src/machine.tex')
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1 files changed, 2 insertions, 2 deletions
diff --git a/src/machine.tex b/src/machine.tex
index 57af849..ddaf0b7 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -95,8 +95,8 @@ through to bit 25 which encodes ``Z''). The ``I'' bit will be set for
RV32I, RV64I, RV128I base ISAs, and the ``E'' bit will be set for
RV32E. The Extensions field is a \warl\ field that can contain writable bits
where the implementation allows the supported ISA to be modified. At
-reset, the Extensions field should contain the maximal set of supported
-extensions, and I should be selected over E if both are available.
+reset, the Extensions field shall contain the maximal set of supported
+extensions, and I shall be selected over E if both are available.
The RV128I base ISA is not yet frozen, and while much of the remainder of this
specification is expected to apply to RV128, this version of the document