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authorAndrew Waterman <andrew@sifive.com>2018-12-10 12:02:21 -0800
committerAndrew Waterman <andrew@sifive.com>2018-12-10 12:02:21 -0800
commit86252cf1ee04fc4b237f12b4c83e2715282f15e0 (patch)
tree40bbcf74aaecfd64b95e175a143bcd01133e9b08 /src/machine.tex
parent3fa2794679679eb2b93c940b745ec0851f94cc80 (diff)
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fix typos
Diffstat (limited to 'src/machine.tex')
-rw-r--r--src/machine.tex4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/machine.tex b/src/machine.tex
index 0bd5e0b..d42b7a3 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -92,9 +92,9 @@ with a single bit per letter of the alphabet (bit 0 encodes presence
of extension ``A'' , bit 1 encodes presence of extension ``B'',
through to bit 25 which encodes ``Z''). The ``I'' bit will be set for
RV32I, RV64I, RV128I base ISAs, and the ``E'' bit will be set for
-RV32E. The Extension is a \warl\ field that can contain writable bits
+RV32E. The Extensions field is a \warl\ field that can contain writable bits
where the implementation allows the supported ISA to be modified. At
-reset, the Extension field should contain the maximal set of supported
+reset, the Extensions field should contain the maximal set of supported
extensions, and I should be selected over E if both are available.
The RV128I base ISA is not yet frozen, and while much of the remainder of this