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authorAndrew Waterman <andrew@sifive.com>2017-11-09 17:20:29 -0800
committerAndrew Waterman <andrew@sifive.com>2017-11-09 17:20:29 -0800
commit32b74b7a02e492c48a910ba0d20bcc52155b0616 (patch)
tree671303c0c0b3b2dc32b8f6211131af8225fa5d05 /src/machine.tex
parent059f64c941856f249d8a0647e23e150dbdb1f62c (diff)
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Make MPP/SPP WARL fields
Diffstat (limited to 'src/machine.tex')
-rw-r--r--src/machine.tex9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/machine.tex b/src/machine.tex
index fdff47f..e22c4f4 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -543,11 +543,14 @@ value {\em y}, {\em x}\,IE is set to {\em x}\,PIE; the privilege mode
is changed to {\em y}; {\em x}\,PIE is set to 1; and {\em x}\,PP is
set to U (or M if user-mode is not supported).
-{\em x}\,PP fields are \wlrl\ fields that need only be able to store
-supported privilege modes, including {\em x} and any implemented
-privilege mode lower than {\em x}.
+{\em x}\,PP fields are \warl\ fields that can hold only privilege mode {\em x}
+and any implemented privilege mode lower than {\em x}. If privilege mode {\em
+x} is not implemented, then {\em x}\,PP must be hardwired to 0.
\begin{commentary}
+M-mode software can determine whether a privilege mode is implemented
+by writing that mode to MPP then reading it back.
+
If the machine provides only U and M modes, then only a single
hardware storage bit is required to represent either 00 or 11 in MPP.
\end{commentary}