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| author | David-Horner <ds2horner@gmail.com> | 2020-01-20 16:56:37 -0500 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-01-20 13:56:37 -0800 |
| commit | 214ed982fdc4e745b77efdec0d92883773a6cd8d (patch) | |
| tree | a4c237f762b947f5cd598319912968a5e236494a /src/machine.tex | |
| parent | 2078cd5ee4f8bbea60c76c27b3b26a96f99f4d22 (diff) | |
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ignore write to "controlled" SBE and UBE. (#477)
* ignore write to "controlled" SBE and UBE.
Behaviour when endian fields are hard-coupled is not well defined.
If both fields are written with opposite endianness which takes precedence,
or are the fields left unchanged?
Both approaches are currently used in CSRs.
Further complicating the situation on RV32 systems is the separation
of UBE from MBE/SBE into two CSRs.
Whereas precedence and conflict cannot be determined for two discrete CSR
updates I propose instead that controlled fields not be directly writable.
Signed-off-by: David Horner <ds2horner@gmail.com>
* fix typo to ignore write to "controlled" SBE and UBE.
Signed-off-by: David Horner <ds2horner@gmail.com>
Diffstat (limited to 'src/machine.tex')
| -rw-r--r-- | src/machine.tex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/machine.tex b/src/machine.tex index f200a54..615ef3e 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -746,9 +746,9 @@ ordinarily be required for a world switch. \end{commentary} If S-mode is supported, an implementation may hardwire SBE so that -SBE=MBE. +SBE=MBE and writes to SBE are ignored. If U-mode is supported, an implementation may hardwire UBE so that -UBE=MBE or UBE=SBE. +UBE=MBE or UBE=SBE and writes to UBE are ignored. \begin{commentary} An implementation supports only little-endian memory accesses if fields |