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authorAndrew Waterman <andrew@sifive.com>2017-11-09 16:55:13 -0800
committerAndrew Waterman <andrew@sifive.com>2017-11-09 16:55:13 -0800
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State that writable-but-not-readable PMPs are reserved
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@@ -2668,7 +2668,8 @@ space, so the RV64 PMP address registers impose the same limit.
Figure~\ref{pmpcfg} shows the layout of a PMP configuration register. The R,
W, and X bits, when set, indicate that the PMP entry permits read, write, and
instruction execution, respectively. When one of these bits is clear, the
-corresponding access type is denied. The remaining two fields, A and L, are
+corresponding access type is denied. The combination R=0 and W=1 is reserved
+for future use. The remaining two fields, A and L, are
described in the following sections.
\begin{figure}[h!]