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authorAndrew Waterman <andrew@sifive.com>2018-08-12 16:58:46 -0700
committerAndrew Waterman <andrew@sifive.com>2018-08-12 17:02:31 -0700
commit6fad4fb56922bb3d27a2862e3adc9fcd3106d8ec (patch)
tree5c495716ea55aa9f1a31cc071204bd8bbb97baba /src/m.tex
parentb8bb0553a59da2f884605736d6a249af0e45ae1f (diff)
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Improve RV64 32x32->64 text; move to commentary
Diffstat (limited to 'src/m.tex')
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1 files changed, 9 insertions, 4 deletions
diff --git a/src/m.tex b/src/m.tex
index 66c11f8..9f0ee4c 100644
--- a/src/m.tex
+++ b/src/m.tex
@@ -60,10 +60,15 @@ with the less-significant words of the multiplicand (which are unsigned).
MULW is an RV64 instruction that multiplies the lower 32 bits of the source
registers, placing the sign-extension of the lower 32 bits of the result
-into the destination register. In RV64, MUL can be used to obtain the upper
-32 bits of the 64-bit product, but signed arguments must be proper 32-bit
-signed values, whereas unsigned arguments must have their upper 32 bits
-clear.
+into the destination register.
+
+\begin{commentary}
+In RV64, MUL can be used to obtain the upper 32 bits of the 64-bit product,
+but signed arguments must be proper 32-bit signed values, whereas unsigned
+arguments must have their upper 32 bits clear. If the
+arguments are not known to be sign- or zero-extended, an alternative is to
+shift both arguments left by 32 bits, then use MULH[[S]U].
+\end{commentary}
\section{Division Operations}