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author | Andrew Waterman <andrew@sifive.com> | 2018-02-22 01:20:51 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2018-02-22 01:39:52 -0800 |
commit | a4ade78dcbb56a84d6577b167443fbca3bf82770 (patch) | |
tree | 2a5d5a5c517c6a0bbc4744f607a4fe50c8c22a1e /src/intro.tex | |
parent | a439dada57fe6c1ed426351742a5ba7dd2cace37 (diff) | |
download | riscv-isa-manual-a4ade78dcbb56a84d6577b167443fbca3bf82770.zip riscv-isa-manual-a4ade78dcbb56a84d6577b167443fbca3bf82770.tar.gz riscv-isa-manual-a4ade78dcbb56a84d6577b167443fbca3bf82770.tar.bz2 |
Introduce IALIGN; propose misa.C semantics
Diffstat (limited to 'src/intro.tex')
-rw-r--r-- | src/intro.tex | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intro.tex b/src/intro.tex index 142e358..53cfe1a 100644 --- a/src/intro.tex +++ b/src/intro.tex @@ -268,6 +268,11 @@ providing compressed 16-bit instructions and relaxes the alignment constraints to allow all instructions (16 bit and 32 bit) to be aligned on any 16-bit boundary to improve code density. +We use the term IALIGN (measured in bits) to refer to the instruction-address +alignment constraint the implementation enforces. IALIGN is 32 bits in the +base ISA, but some ISA extensions, including the compressed ISA extension, +relax IALIGN to 16 bits. IALIGN may not take on any other value. + We use the term ILEN (measured in bits) to refer to the maximum instruction length supported by an implementation, and which is always a multiple of 16 bits. For implementations supporting only a base |