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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-08-26 06:04:51 -0700 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-08-26 06:04:51 -0700 |
commit | 9cf5c8e3eff9973bb97869419c4375fabd6e64b8 (patch) | |
tree | 4db0da7d535af7ee8d2414014e545e7030085784 /src/intro.tex | |
parent | 48df4e3688823c01dbca5e61b2f2e8cfb6ebd6d9 (diff) | |
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Updated several "user" references to "unprivileged".
Diffstat (limited to 'src/intro.tex')
-rw-r--r-- | src/intro.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intro.tex b/src/intro.tex index 59f7087..461197f 100644 --- a/src/intro.tex +++ b/src/intro.tex @@ -255,7 +255,7 @@ practice, even with compatible encodings, due to the differences in software calling conventions and system-call interfaces. The RISC-V privileged architecture provides fields in {\tt - misa} to control the user ISA at each level to support emulating + misa} to control the unprivileged ISA at each level to support emulating different base ISAs on the same hardware. We note that newer SPARC and MIPS ISA revisions have deprecated support for running 32-bit code unchanged on 64-bit systems. |