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| author | ansimita <11040069+ansimita@users.noreply.github.com> | 2020-01-13 19:13:33 +0000 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-01-13 11:13:33 -0800 |
| commit | 2078cd5ee4f8bbea60c76c27b3b26a96f99f4d22 (patch) | |
| tree | 173e06aedc705484d5e4c268bbc75ce665d2f37d /src/intro.tex | |
| parent | 1ca47c3bfe1ddb70816b5fff7ffe834054709c69 (diff) | |
| download | riscv-isa-manual-2078cd5ee4f8bbea60c76c27b3b26a96f99f4d22.zip riscv-isa-manual-2078cd5ee4f8bbea60c76c27b3b26a96f99f4d22.tar.gz riscv-isa-manual-2078cd5ee4f8bbea60c76c27b3b26a96f99f4d22.tar.bz2 | |
Correct left double quotes (#475)
Diffstat (limited to 'src/intro.tex')
| -rw-r--r-- | src/intro.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intro.tex b/src/intro.tex index 17be148..1ed0bda 100644 --- a/src/intro.tex +++ b/src/intro.tex @@ -200,7 +200,7 @@ environment but must do so in a way that guest harts operate like independent hardware threads. In particular, if there are more guest harts than host harts then the execution environment must be able to preempt the guest harts and must not wait indefinitely for guest -software on a guest hart to "yield" control of the guest hart. +software on a guest hart to ``yield" control of the guest hart. \end{commentary} \section{RISC-V ISA Overview} |