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author | kanataso <kanapo.go@gmail.com> | 2023-07-12 23:25:35 +0900 |
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committer | Andrew Waterman <andrew@sifive.com> | 2023-07-12 13:40:16 -0700 |
commit | 8631b79db26cb338cb2b697e5afeb1350396df51 (patch) | |
tree | 86fb14560bc1f749ac5eef4f9c051561101562d6 /src/intro.adoc | |
parent | 88f0547851943bdfd2f20ce29528b7030afee360 (diff) | |
download | riscv-isa-manual-8631b79db26cb338cb2b697e5afeb1350396df51.zip riscv-isa-manual-8631b79db26cb338cb2b697e5afeb1350396df51.tar.gz riscv-isa-manual-8631b79db26cb338cb2b697e5afeb1350396df51.tar.bz2 |
Add RV64E to Base Integer ISA
RV32E and RV64E Base Integer Instruction Sets is Ratified.
Signed-off-by: kanataso <kanapo.go@gmail.com>
Diffstat (limited to 'src/intro.adoc')
-rw-r--r-- | src/intro.adoc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/intro.adoc b/src/intro.adoc index d251964..5f4e585 100644 --- a/src/intro.adoc +++ b/src/intro.adoc @@ -221,9 +221,9 @@ integer variants, RV32I and RV64I, described in <<rv32>> and <<rv64>>, which provide 32-bit or 64-bit address spaces respectively. We use the term XLEN to refer to the width of an integer register in bits (either 32 or 64). -<<rv32e, Chapter 6>> describes the RV32E subset variant of the -RV32I base instruction set, which has been added to support small -microcontrollers, and which has half the number of integer registers. +<<rv32e, Chapter 6>> describes the RV32E and RV64E subset variants of the +RV32I or RV64I base instruction sets respectively, which have been added to support small +microcontrollers, and which have half the number of integer registers. <<rv128, Chapter 8>> sketches a future RV128I variant of the base integer instruction set supporting a flat 128-bit address space (XLEN=128). The base integer instruction sets use a two's-complement |