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| author | Bill Traynor <wmat@riscv.org> | 2022-12-15 11:58:46 -0800 |
|---|---|---|
| committer | Bill Traynor <wmat@riscv.org> | 2022-12-15 11:58:46 -0800 |
| commit | 5fdb6738ac8572daccc04f894b83818d6deb3e16 (patch) | |
| tree | 3d5e9be5b964c5bf6f6ae3c6e8eae23d7fb25188 /src/intro.adoc | |
| parent | ecc55290d30fa7671b439bf40826c1e4d77e971e (diff) | |
| download | riscv-isa-manual-5fdb6738ac8572daccc04f894b83818d6deb3e16.zip riscv-isa-manual-5fdb6738ac8572daccc04f894b83818d6deb3e16.tar.gz riscv-isa-manual-5fdb6738ac8572daccc04f894b83818d6deb3e16.tar.bz2 | |
Fixing spacing and single quotes.
Fixing spacing and single quotes.
Diffstat (limited to 'src/intro.adoc')
| -rw-r--r-- | src/intro.adoc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/intro.adoc b/src/intro.adoc index 4b53e49..6cc9bde 100644 --- a/src/intro.adoc +++ b/src/intro.adoc @@ -359,12 +359,12 @@ computations done by the hardware ignore overflow and instead wrap around modulo latexmath:[$2^{\text{XLEN}}$]. The execution environment determines the mapping of hardware resources -into a hart’s address space. Different address ranges of a hart’s +into a hart's address space. Different address ranges of a hart's address space may (1) be vacant, or (2) contain _main memory_, or (3) contain one or more _I/O devices_. Reads and writes of I/O devices may have visible side effects, but accesses to main memory cannot. Although it is possible for the execution environment to call everything -in a hart’s address space an I/O device, it is usually expected that +in a hart's address space an I/O device, it is usually expected that some portion will be specified as main memory. When a RISC-V platform has multiple harts, the address spaces of any two @@ -381,7 +381,6 @@ translation, it is common for each hart to be given a virtual address space that is largely or entirely its own. ==== (((memory access, implicit and explicit))) - Executing each RISC-V machine instruction entails one or more memory accesses, subdivided into _implicit_ and _explicit_ accesses. For each instruction executed, an _implicit_ memory read (instruction fetch) is |