Add FLH, FSH to defined transformed instructions for H extension (#792)

1 files changed, 6 insertions, 6 deletions

diff --git a/src/hypervisor.tex b/src/hypervisor.tex
index 96e6a11..c4c2c34 100644
--- a/src/hypervisor.tex
+++ b/src/hypervisor.tex
@@ -3280,7 +3280,7 @@ pseudoinstruction value).
 \FloatBarrier
 
 For a standard load instruction that is not a compressed instruction and
-is one of LB, LBU, LH, LHU, LW, LWU, LD, FLW, FLD, or FLQ, the
+is one of LB, LBU, LH, LHU, LW, LWU, LD, FLW, FLD, FLQ, or FLH, the
 transformed instruction has the format shown in
 Figure~\ref{transformedloadinst}.
 
@@ -3309,14 +3309,14 @@ Figure~\ref{transformedloadinst}.
 }
 \vspace{-0.1in}
 \caption{Transformed noncompressed load instruction (LB, LBU, LH, LHU,
-LW, LWU, LD, FLW, FLD, or FLQ).
+LW, LWU, LD, FLW, FLD, FLQ, or FLH).
 Fields funct3, rd, and opcode are the same as the trapping load
 instruction.}
 \label{transformedloadinst}
 \end{figure*}
 
 For a standard store instruction that is not a compressed instruction and
-is one of SB, SH, SW, SD, FSW, FSD, or FSQ, the transformed instruction
+is one of SB, SH, SW, SD, FSW, FSD, FSQ, or FSH, the transformed instruction
 has the format shown in Figure~\ref{transformedstoreinst}.
 
 \begin{figure*}[h!]
@@ -3344,7 +3344,7 @@ has the format shown in Figure~\ref{transformedstoreinst}.
 }
 \vspace{-0.1in}
 \caption{Transformed noncompressed store instruction (SB, SH, SW, SD,
-FSW, FSD, or FSQ).
+FSW, FSD, FSQ, or FSH).
 Fields rs2, funct3, and opcode are the same as the trapping store
 instruction.}
 \label{transformedstoreinst}
@@ -3447,8 +3447,8 @@ the trapping instruction is compressed and {\tt 11} if not.
 \begin{commentary}
 In decoding the contents of {\tt mtinst} or {\tt htinst}, once software
 has determined that the register contains the encoding of a standard
-basic load (LB, LBU, LH, LHU, LW, LWU, LD, FLW, FLD, or FLQ) or basic
-store (SB, SH, SW, SD, FSW, FSD, or FSQ), it is not necessary to confirm
+basic load (LB, LBU, LH, LHU, LW, LWU, LD, FLW, FLD, FLQ, or FLH) or basic
+store (SB, SH, SW, SD, FSW, FSD, FSQ, or FSH), it is not necessary to confirm
 also that the immediate offset fields (31:25, and 24:20 or 11:7) are
 zeros.
 The knowledge that the register's value is the encoding of a basic