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| author | Daniel Lustig <dlustig@nvidia.com> | 2021-11-02 11:12:57 -0400 |
|---|---|---|
| committer | Daniel Lustig <dlustig@nvidia.com> | 2021-11-02 11:13:14 -0400 |
| commit | 5e8d2db74b524d47e68fd03fbe07d5768b25f018 (patch) | |
| tree | 4dac4a4889e2a88fe1da093c6efe7162db50fd74 /src/hypervisor.tex | |
| parent | 350e962c5109b80ceab414c305e37b9cc88f28b7 (diff) | |
| download | riscv-isa-manual-5e8d2db74b524d47e68fd03fbe07d5768b25f018.zip riscv-isa-manual-5e8d2db74b524d47e68fd03fbe07d5768b25f018.tar.gz riscv-isa-manual-5e8d2db74b524d47e68fd03fbe07d5768b25f018.tar.bz2 | |
Add the Svinval standard extension
Diffstat (limited to 'src/hypervisor.tex')
| -rw-r--r-- | src/hypervisor.tex | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/hypervisor.tex b/src/hypervisor.tex index 0b8e82d..269c809 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -283,8 +283,8 @@ instruction exception. When VTW=1 (and assuming {\tt mstatus}.TW=0), an attempt in VS-mode to execute WFI raises a virtual instruction exception if the WFI does not complete within an implementation-specific, bounded time limit. -When VTVM=1, an attempt in VS-mode to execute SFENCE.VMA or to access CSR -{\tt satp} raises a virtual instruction exception. +When VTVM=1, an attempt in VS-mode to execute SFENCE.VMA or SINVAL.VMA or to +access CSR {\tt satp} raises a virtual instruction exception. The VGEIN (Virtual Guest External Interrupt Number) field selects a guest external interrupt source for VS-level external interrupts. @@ -2175,8 +2175,8 @@ not in VS-mode. The TW field affects execution in all modes except M-mode. Setting TVM=1 prevents HS-mode from accessing {\tt hgatp} or executing -HFENCE.GVMA, but has no effect on accesses to {\tt vsatp} or instruction -HFENCE.VVMA. +HFENCE.GVMA or HINVAL.GVMA, but has no effect on accesses to {\tt vsatp} or +instructions HFENCE.VVMA or HINVAL.VVMA. The hypervisor extension changes the behavior of the the Modify Privilege field, MPRV, of {\tt mstatus}. @@ -2900,8 +2900,8 @@ implementation-specific, bounded time; in VS-mode, attempts to execute SRET when {\tt hstatus}.VTSR=1; and \item -in VS-mode, attempts to execute an SFENCE instruction or to access -{\tt satp}, when {\tt hstatus}.VTVM=1. +in VS-mode, attempts to execute an SFENCE.VMA or SINVAL.VMA instruction or to +access {\tt satp}, when {\tt hstatus}.VTVM=1. \end{itemize} Other extensions to the \mbox{RISC-V} Privileged Architecture may add |