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| author | Andrew Waterman <andrew@sifive.com> | 2018-01-03 11:03:15 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-01-03 11:03:31 -0800 |
| commit | 1b2322007b269c9557a3959d8065e418f605cf51 (patch) | |
| tree | 2f650997f35963f19d1abc55b622c708f666406b /src/hypervisor.tex | |
| parent | a33c4d6be2f2f5326be74fed85afd9deea5c5887 (diff) | |
| download | riscv-isa-manual-1b2322007b269c9557a3959d8065e418f605cf51.zip riscv-isa-manual-1b2322007b269c9557a3959d8065e418f605cf51.tar.gz riscv-isa-manual-1b2322007b269c9557a3959d8065e418f605cf51.tar.bz2 | |
Fix typo
h/t Christoph Hellwig
Diffstat (limited to 'src/hypervisor.tex')
| -rw-r--r-- | src/hypervisor.tex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/hypervisor.tex b/src/hypervisor.tex index 5b4f4bd..00c2a8b 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -626,7 +626,7 @@ fields is the same as for {\tt satp}. \end{center} } \vspace{-0.1in} -\caption{RV32 background supervisor address translation and protection register {\tt satp}.} +\caption{RV32 background supervisor address translation and protection register {\tt bsatp}.} \label{rv32bsatpreg} \end{figure} @@ -647,7 +647,7 @@ fields is the same as for {\tt satp}. \end{center} } \vspace{-0.1in} -\caption{RV64 background supervisor address translation and protection register {\tt satp}, for MODE +\caption{RV64 background supervisor address translation and protection register {\tt bsatp}, for MODE values Bare, Sv39, and Sv48.} \label{rv64bsatpreg} \end{figure*} |