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author | HairyFotr <hairyfotr@gmail.com> | 2017-05-07 15:14:26 +0200 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2017-05-07 12:53:48 -0700 |
commit | fbb2a8533d18a80d67a2489c8c7850d3102df268 (patch) | |
tree | 147e74e440c9f1db76ca8b091805da7fd876a537 /src/f.tex | |
parent | eb85e84d512ec653a617292493e69c6c65c5ea61 (diff) | |
download | riscv-isa-manual-fbb2a8533d18a80d67a2489c8c7850d3102df268.zip riscv-isa-manual-fbb2a8533d18a80d67a2489c8c7850d3102df268.tar.gz riscv-isa-manual-fbb2a8533d18a80d67a2489c8c7850d3102df268.tar.bz2 |
Fix typos
Diffstat (limited to 'src/f.tex')
-rw-r--r-- | src/f.tex | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -561,7 +561,7 @@ of {\em rs2}'s sign bit; and for FSGNJX, the sign bit is the XOR of the sign bits of {\em rs1} and {\em rs2}. Sign-injection instructions do not set floating-point exception flags. Note, FSGNJ.S {\em rx, ry, ry} moves {\em ry} to {\em rx} (assembler pseudo-op FMV.S {\em rx, - ry}); FSGNJN.S {\em rx, ry, ry} moves the the negation of {\em ry} to + ry}); FSGNJN.S {\em rx, ry, ry} moves the negation of {\em ry} to {\em rx} (assembler pseudo-op FNEG.S {\em rx, ry}); and FSGNJX.S {\em rx, ry, ry} moves the absolute value of {\em ry} to {\em rx} (assembler pseudo-op FABS.S {\em rx, ry}). @@ -707,7 +707,7 @@ The FCLASS.S instruction examines the value in floating-point register {\em rs1} and writes to integer register {\em rd} a 10-bit mask that indicates the class of the floating-point number. The format of the mask is described in Table~\ref{tab:fclass}. The corresponding bit in {\em rd} will -be set if the the property is true and clear otherwise. All other bits in +be set if the property is true and clear otherwise. All other bits in {\em rd} are cleared. Note that exactly one bit in {\em rd} will be set. \vspace{-0.2in} |