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| author | Andrew Waterman <andrew@sifive.com> | 2020-09-11 14:46:16 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-09-11 14:46:16 -0700 |
| commit | 7da2d4ccefb5f11094ed9e1d2ef4c99a75de7888 (patch) | |
| tree | 431ee45d987953c34f6933d507297141e789ca95 /src/dep-table.tex | |
| parent | f46dba69f67ad721c969afb53aeb2a632b3efe82 (diff) | |
| download | riscv-isa-manual-7da2d4ccefb5f11094ed9e1d2ef4c99a75de7888.zip riscv-isa-manual-7da2d4ccefb5f11094ed9e1d2ef4c99a75de7888.tar.gz riscv-isa-manual-7da2d4ccefb5f11094ed9e1d2ef4c99a75de7888.tar.bz2 | |
Fix possible exception list for FCVT.D.S and FCVT.S.D
Diffstat (limited to 'src/dep-table.tex')
| -rw-r--r-- | src/dep-table.tex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dep-table.tex b/src/dep-table.tex index de08546..1873ea1 100644 --- a/src/dep-table.tex +++ b/src/dep-table.tex @@ -413,9 +413,9 @@ $^\ddagger$The instruction carries dependencies from source register(s) to desti \cline{2-4} FMAX.D & {\em rs1}, {\em rs2} & {\em rd} & NV & \\ \cline{2-4} - FCVT.S.D & {\em rs1}, frm$^*$ & {\em rd} & NX & $^*$if rm=111 \\ + FCVT.S.D & {\em rs1}, frm$^*$ & {\em rd} & NV, OF, UF, NX & $^*$if rm=111 \\ \cline{2-4} - FCVT.D.S & {\em rs1}, frm$^*$ & {\em rd} & NX & $^*$if rm=111 \\ + FCVT.D.S & {\em rs1}, frm$^*$ & {\em rd} & NV & $^*$if rm=111 \\ \cline{2-4} FEQ.D & {\em rs1}, {\em rs2} & {\em rd} & NV & \\ \cline{2-4} |