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author | Edward Forgacs <eddie.forgacs@gmail.com> | 2022-04-11 07:54:02 +0200 |
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committer | Bill Traynor <btraynor@gmail.com> | 2022-07-26 11:50:15 -0400 |
commit | 5219bfff86a1a7a92a7227a651d5eb20f14416ff (patch) | |
tree | efe854a89820bf90c2c1724b12a3e6864681138c /src/c.tex | |
parent | 4fe7e487b309827d0328af4804beb82d2e96d5e8 (diff) | |
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Fix typo: "instruction" -> "instructions" (#834)
Diffstat (limited to 'src/c.tex')
-rw-r--r-- | src/c.tex | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -634,7 +634,7 @@ by 8, to the base address in register {\em \rsoneprime}. It expands to {\tt fsd RVC provides unconditional jump instructions and conditional branch instructions. As with base RVI instructions, the offsets of all RVC -control transfer instruction are in multiples of 2 bytes. +control transfer instructions are in multiples of 2 bytes. \begin{center} \begin{tabular}{S@{}L@{}Y} |